LDO Design in Cadence


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    LDO design in cadence

LDO Design in Cadence

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LDO Design in Cadence

LDO Design in Cadence




CMOS LDO Design using Cadence

LDO Design in Cadence


Low Dropout (LDO) Linear Voltage Regulators

  • LDO Design in Cadence

Linear voltage regulators are key components in any power-management system that requires a stable and ripple-free power supply. A subset of linear voltage regulators is a class of circuits known as low dropout (LDO) regulators. This paper explains the fundamentals of LDOs and introduces Vidatronic’s LDO technology which solves many of the known shortcomings of LDO circuits.

  • INTRODUCTION & BACKGROUND

A linear voltage regulator is a circuit that takes in a variable input voltage and provides a continuously controlled, steady, low-noise DC output voltage. Generally, linear voltage regulators require a large voltage drop between the input and the output to function correctly. This requires a relatively high-voltage input power supply and results in low power efficiency. A low dropout (LDO) linear voltage regulator is a type of linear voltage regulator circuit that works well even when the output voltage is very close to the input voltage, improving its power efficiency.

  • ADDITIONAL FEATURES

In addition to the above-mentioned fundamental functionality of an LDO, several other useful features can be included.

  • Enable/Disable

Many LDOs have a control input to enable the regulator or shut it down. This is useful for overall system power savings where the regulator is turned off when the system is idling or in an inactive state. There can be more intermediate power states, such as low power mode or ultra-low power mode, where the LDO output is maintained at the cost of system performance, depending on system requirements.

On devices with active-high logic, a high logic level enables the regulator, while a low input disables it. Vidatronic’s LDO IP cores use this convention.

  • Soft-Start, Soft-Shutdown

Powering up the LDO is an important event and care must be taken to ensure that the output voltage rises at the optimal speed. If the voltage builds up too fast, it can trigger ESD clamps at the output and/or drive more than the rated current while trying to charge up the load. To prevent such unwanted occurrences, which can cause temporary or permanent damage to circuitry, the rate at which the output comes up is controlled. This is called Soft-Start.

Vidatronic’s IP cores provide Soft-Start functionality, ensuring a smooth, monotonic startup. The maximum slew rate is internally limited and given in the electrical specifications table of the datasheet.

Similarly, when the LDO is disabled, the output voltage will decay as a function of output capacitance and load current. Vidatronic’s IP cores have an additional feature normally not found on most LDOs. Should the part be re-enabled before the output fully decays, a slew rate function within the IP core will first bring the output voltage to zero before restarting, thus eliminating issues with startup glitches or non-monotonicity.

  • Over-Current/Over-Temperature Shutdown

In the event of prolonged exposure to conditions over and beyond the rated temperatures and load current levels, immediate or long-term damage to the device can occur. To safeguard against these risks, power systems usually have built-in over-current and over-temperature protection circuitry. There are different implementations that can be found from different manufacturers. Some are simple analog circuits that shut down the device when set thresholds are reached and require the faulty conditions to be removed before they can power up again. More advanced implementations include periodic polling to check if the faults are present or removed. In the case of persistent faults, this polling continues indefinitely.

 

 

 


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