Vehicle-to-Grid (V2G) System: Flow Diagram, MOSFET & Inductor Driver Circuit

How a V2G System Is Built

A V2G charger is a bidirectional power converter in two stages. On the vehicle side, an isolated or non-isolated DC-DC stage matches the battery voltage to a DC link and can reverse its current. On the grid side, an AC-DC inverter/rectifier converts between the DC link and the mains. A controller coordinates both and talks to the vehicle and the utility or aggregator.

Why the half-bridge matters

The simplest reversible DC-DC building block is a synchronous half-bridge with an inductor. The same two MOSFETs and one inductor run as a buck when charging the battery and as a boost when sending energy back, so it is the standard teaching circuit for V2G power electronics.

What each part does

Inductor stores and smooths current
Q1 / Q2 steer energy in either direction
Gate driver turns controller logic into fast gate pulses
Bootstrap supply powers the high-side driver
Shunt gives current feedback
DC-link capacitor buffers power ripple
Inverter and LCL filter feed clean AC to the grid
Contactor and protection isolate faults

Flow Diagrams: Power, Information and Decisions

Energy flows through the converters; signals flow through the controller and communication links.

🔋 EV Battery
+ BMS

↔

🔁 DC-DC Stage
(MOSFET + L)

↔

⚡ DC Link
(Cdc)

↔

🔌 Inverter +
LCL Filter

↔

🏭 Grid / Home
Meter

📡 Utility / Aggregator
Signal

→

☁️ Charger
Backend (OCPP)

→

🎛️ Controller
(Set-points)

→

⚙️ PWM + Gate
Drivers

Operating-mode decision flowchart

The loop runs every control period Ts. The reserve margin protects the driver's range; the safety check always has priority over market signals.

Bidirectional Half-Bridge Power-Stage Circuit

Battery, current shunt and inductor on the left, MOSFET half-bridge in the middle, DC link and inverter on the right.

Power pathGate signal from driver

Two directions, one circuit

Charging (buck): the DC link is the source. Q1 is the active switch, Q2 acts as the synchronous rectifier, and the inductor delivers a smoothed current into the battery. Discharging (boost): Q2 is the active switch that charges the inductor from the battery, and Q1 then releases that energy to the higher DC-link voltage. Duty cycle in boost mode: D = 1 − Vbat / Vdc.

MOSFET Gate-Driver Circuit with Bootstrap Supply

The high-side MOSFET's source moves with the switch node, so it needs a floating supply. A bootstrap diode and capacitor provide it from a single 12 V rail.

Complementary PWM + dead time

The controller outputs PWM_H and PWM_L with 100–200 ns of dead time so Q1 and Q2 never conduct together.

Bootstrap Dboot + Cboot

When Q2 turns on, VS is pulled to ground and Cboot charges through Dboot. Choose Cboot ≥ Qg / ΔV with a 10× margin.

Gate resistor Rg

Sets turn-on speed. With a 12 V drive and 10 Ω, peak gate current is about 1.2 A. A parallel diode with a smaller turn-off resistor speeds turn-off.

Gate pull-down Rgs

A 10 kΩ resistor from gate to source keeps the MOSFET off if the driver loses power or the pin floats.

Decoupling

Place a 100 nF ceramic right at the driver VCC pin plus a 1 µF bulk capacitor; keep the gate loop as short as possible.

Protection

Add a TVS or Schottky clamp where needed, and use driver UVLO and a hardware overcurrent comparator that can disable PWM.

Worked Design: Inductor and MOSFET Sizing

Example: 1 kW stage, 48 V battery, 100 V DC link, 50 kHz switching, 30% inductor ripple.

Boost duty: D = 1 − Vbat / Vdc = 1 − 48/100 = 0.52
Average current: I_L = P / Vbat = 1000 / 48 ≈ 20.8 A
Ripple current: ΔI_L = 0.30 × 20.8 ≈ 6.25 A
Inductor: L = Vbat · D / (fs · ΔI_L) = 48 × 0.52 / (50 000 × 6.25) ≈ 80 µH
Peak current: I_pk = I_L + ΔI_L/2 ≈ 24 A (core must not saturate here, plus margin)

MOSFET voltage: V_DS(max) ≥ 1.3–1.5 × Vdc → choose a 150 V device
Conduction loss: P_cond ≈ I_L² · R_DS(on) (two devices share the period)
Gate drive power: P_g = Q_g · V_gs · fs = 40 nC × 10 V × 50 kHz = 20 mW per MOSFET
Bootstrap cap: C_boot ≥ Q_g / ΔV = 40 nC / 0.5 V = 80 nF → use ≥ 0.47 µF
Gate current: I_g(pk) ≈ V_drv / R_g = 12 V / 10 Ω ≈ 1.2 A

Python Loss Model for the Half-Bridge

This script reproduces the numbers above and estimates losses at different power levels. The output below is what it actually printed.

halfbridge_design.py

import numpy as np
# Bidirectional synchronous buck-boost stage: 48 V battery  <->  100 V DC link (boost when discharging)
Vb, Vdc, fs = 48.0, 100.0, 50e3
D = 1 - Vb/Vdc                       # boost duty (low-side switch on-time)
Rds, Rdcr, Vf = 10e-3, 5e-3, 0.8     # MOSFET Rds(on), inductor DCR, body-diode drop
tsw, td, Qg, Vg = 20e-9, 150e-9, 40e-9, 10.0   # rise+fall time, dead time, gate charge, drive voltage
ripple = 0.30
P_rated = 1000.0
IL = P_rated/Vb
dI = ripple*IL
L = Vb*D/(fs*dI)
print(f"Duty D = {D:.2f}   I_L(avg) = {IL:.1f} A   ripple = {dI:.2f} A   L = {L*1e6:.0f} uH   I_peak = {IL+dI/2:.1f} A")
print(f"Gate-drive power per MOSFET = {Qg*Vg*fs*1e3:.0f} mW   Bootstrap C >= {Qg/0.5*1e9:.0f} nF (use 10x margin)")
print(f"\n{&#x27;P (W)':>6} {'I_L (A)':>8} {'Cond (W)':>9} {'Cu (W)':>7} {'Sw (W)':>7} {'DT (W)':>7} {'Eff (%)':>8}")
for P in (100, 250, 500, 750, 1000):
    i = P/Vb
    cond = i**2*Rds                   # the two switches together carry I_L for the whole period
    cu   = i**2*Rdcr
    sw   = 0.5*Vdc*i*tsw*fs          # hard-switched device only
    dt   = Vf*i*2*td*fs
    gate = 2*Qg*Vg*fs
    loss = cond+cu+sw+dt+gate
    print(f"{P:6d} {i:8.1f} {cond:9.2f} {cu:7.2f} {sw:7.2f} {dt:7.2f} {100*P/(P+loss):8.1f}")

output

Duty D = 0.52   I_L(avg) = 20.8 A   ripple = 6.25 A   L = 80 uH   I_peak = 24.0 A
Gate-drive power per MOSFET = 20 mW   Bootstrap C >= 80 nF (use 10x margin)

 P (W)  I_L (A)  Cond (W)  Cu (W)  Sw (W)  DT (W)  Eff (%)
   100      2.1      0.04    0.02    0.10    0.03     99.8
   250      5.2      0.27    0.14    0.26    0.06     99.7
   500     10.4      1.09    0.54    0.52    0.12     99.5
   750     15.6      2.44    1.22    0.78    0.19     99.4
  1000     20.8      4.34    2.17    1.04    0.25     99.2

Idealised estimate: only conduction, copper, hard-switching and dead-time loss are included. Core loss, AC winding resistance, gate drive and sensing add more, so measured efficiency will be lower than the table.

Choosing the MOSFET and the Inductor Core

MOSFET type	Voltage range	Strength	Limitation	Typical use
Silicon MOSFET	≤ 200 V	Cheapest, many sources, easy drive (10–12 V)	Higher Qg and reverse-recovery, slower, limited to ~100 kHz in hard switching	48 V ↔ 100–150 V bench prototypes
SiC MOSFET	650 V – 1.7 kV	Low switching loss, high temperature, fast body diode	Needs 18–20 V / −3 to −5 V drive, higher cost, careful dv/dt handling	Full-size 400–800 V V2G chargers
GaN HEMT	100 V – 650 V	Very low Qg, MHz capability, tiny magnetics	Fragile gate (±6 V), layout-critical, special drivers	High-density on-board chargers

Inductor core	Strength	Limitation	Typical use
Powder iron / Kool Mu	Soft saturation, cheap, high DC bias tolerance	Higher core loss above ~100 kHz	Bench boost/buck stages at 20–60 kHz
Ferrite (gapped)	Very low core loss at high frequency	Hard saturation; gap fringing loss	Transformer and high-frequency inductors
Nanocrystalline / amorphous	High Bsat and low loss	Cost, mechanical fragility	High-power DAB and interleaved stages
Litz-wire windings	Cuts skin and proximity loss	Fills the window less	Above 50 kHz at tens of amps

PCB Layout and Protection Checklist

Minimise power loop

Keep Q1, Q2 and the DC-link capacitor close together to reduce loop inductance and voltage spikes.

Short gate loops

Place the driver next to the MOSFETs, with gate and return traces tightly paired.

Kelvin current sensing

Route sense traces directly from the shunt pads, away from the switch node.

Thermal design

Use copper pours and vias under MOSFETs, and a heatsink sized from the loss table plus margin.

Hardware protection

Fuse, pre-charge, overcurrent and overvoltage comparators that act without software.

Isolation and safety

Isolate control from power, use galvanic isolation where needed, and test first at low voltage.

Troubleshooting the Half-Bridge

Symptom	Likely cause	Fix
Hot MOSFETs, supply current spikes	Shoot-through: both devices on at once	Increase dead time (100–200 ns), check driver propagation delay, verify complementary PWM
Ringing and false turn-on at SW node	Fast dv/dt with long gate loop	Shorten gate loop, add Rg, use Miller clamp or negative turn-off, keep Rgs close to gate
High-side stops switching near high duty	Bootstrap capacitor discharges	Use larger Cboot, a low-leakage diode, or an isolated bias supply for the high side
Current spikes, inductor buzzes	Core saturation	Use a core with more headroom or larger gap, check peak current and temperature
Noisy current feedback	Switching noise on the shunt sense	Kelvin-connect the shunt, add RC filter, sample at PWM midpoint, use isolated amp
Efficiency far below calculated value	Core, AC copper and layout losses not modelled	Measure with a power analyser, add core and ESR loss, check thermal images

Frequently Asked Questions

The same two-switch half-bridge can run as a buck (charging the battery) or a boost (discharging to the DC link) by changing which device is the active switch. A diode would only allow one direction, so bidirectional V2G needs the second MOSFET.

Real MOSFETs turn off slower than the gate signal changes. Without a short delay between turning one device off and the other on, both conduct and short the DC link, causing heat and failure.

From the allowed current ripple: L = Vbat·D / (fs·ΔIL). A smaller ripple needs a bigger inductor, while a higher switching frequency lets you shrink it. The core must handle the peak current without saturating.

No. It is a teaching-scale stage. A real EV pack runs at 300–800 V with a BMS, contactors and certification requirements, and mains connection requires isolation, protection and trained supervision.

They are idealised estimates that include conduction, copper, hard-switching and dead-time loss only. Real converters lose more to core loss, AC winding resistance, gate drive and sensing, so expect noticeably lower efficiency in practice; measure your own prototype.

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Vehicle-to-Grid (V2G) System Flow Diagram, MOSFET & Inductor Driver Circuit